Now, I am trying to tune relations to Russian International Innovation Center in Skolkovo.
But Skolkovo Innovation Center is answered, that in my project, as in any another projects, it must take part any foreign partners.
I propose you to be my - such foreign partner, please.
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I developed 128-bit LUX-Septium processor interface decoder emulator-interpreter.
The instruction system of this 128-bit LUX-Septium processor interface decoder is fully byte-oriented and very compact, and even more compact than instruction set of 16-bit processor Intel-8086.
So, LUX-language source module of LUX-language compiler self for 128-bit LUX-Septium processor interface decoder has 4245 operators of instructions.
This LUX-language source module - compiles (by LUX-language compiler) to executing module for LUX-Septium processor interface decoder, which has 8736 bytes length.
This LUX-language source module - compiles (by the same LUX-language compiler) to executing module for 16-bit processor Intel-8086, which has 12273 bytes length.
From this example we have next common processor decoder instruction length.
8736 / 4245 = 2.06 bytes - for 128-bit LUX-Septium processor interface decoder!
12273 / 4245 = 2.89 bytes - for 16-bit Intel-8086 processor.
So, practically, we have such relation - TWO bytes of 128-bit LUX-Septium processor to THREE bytes 16-bit Intel-8086 processor.
The instruction system of this 128-bit LUX-Septium processor interface decoder is very lucid, viewable and understandable!
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Now is not actually to develop CPU instruction system - only as instruction set.
CPU instruction system must let to combine separate instructions to single expression on hardware executable level.
LUX (Lingual Unit Expressions) is the single direct conceptual - tested way from usual mathematical expressions through conceptual instruction system-set to separate arithmetical and logical devices of CPU.
I would like to propose you a byte-oriented application interface for a new universal computer processor.
This processor can have several hundred quick General-Purpose Registers - GPR.
Each GPR length, as usual, is the same as the computer word length and can be 32-bit, 64-bit, 128-bit, 256-bit ... etc.
Such registers set can give each programmer unlimited possibilities for use such registers for dynamic and static variables.
Instruction set has the pointed byte-oriented structure.
Very many Load-Store, Arithmetic and Compare instructions have only one-byte length.
Very many Load-Store, Arithmetic, Logic, Shift and Compare instructions have only two - bytes length.
The rest instructions, which are needed in many - byte address displacements or many - bytes constants correspondently, can be many-bytes length.
All instructions of this Instruction set are very compact, universal and more compact, than the operations of one-address processors.
In the force of these reasons and properties this Instruction Set can be as a Standard of wide range power computers - from small hand-computers until large supercomputers.
This Instruction system is very understandable for programmers and can be readable in its programs even in usual hexadecimal code.
But for this Instruction set were developed not so self- compiled LUX-compiler and emulator-interpreter for Windows-XP 32-bit and Windows-7 64-bit environment, but on-string de - assembler and under-string de - compiler to LUX-language.
Now, I was finished the development of 128-bit registers length - interpreter in Vista and Windows-7 64-bit environment.
And now I practically can develop any program for such 128-bit computer processor.
Naturally, first - I develop the compiler from LUX - language, the emulator - interpreter, the de - assembler and the de - compiler to LUX - language for such 128-bit computer processor, which is used Such Instruction system - set and executable code.
I named this decoder interface and executable code as the Single Unified Universal Genetic Executable Computers Generations Expressions Instructions Code Decoder Interface (SUUGECGEICDI) and Single Genetic Executable Code (SGEC) for Expressible Instructions Sets Computers - EISC.
Such Instruction system can be the Standard Single Genetic Executable Code (SGEC) for Expressible Instructions Sets Computers - EISC.
Such Instruction system let us to develop very effective executable modules for separate standard functions for standard program objects and integrated program and operation systems, which can be used for many - many years and even - for ages.
We all know - how it is difficult to develop very effective executable modules.
It is necessary work hard for a long time - for years - in order to develop very effective executable modules.
And so - it is necessary to let such executable modules to successfully work for many ages!
Such Instruction system can be the standard executable code for most computers - for ages!
TEST HARMONY BY ALGEBRA
About half of all processors in the World - are processors ARM - which is used in all-possible compact computer devices.
About half of all processors in the World - are processors Intel 80x86 which is used in all-possible not so compact computer devices.
Let's take next simple expression:
alpha * beta / gamma + delta - eta (1)
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This expression (1) in show able signs for 3-address Instruction Set ARM we can show as:
=*:A,alpha,beta =/:A,A,gamma =+:A,A,delta =-:A,A,eta
In this case - we can see - that 7 addresses, signed as A - are unnecessary!
This is not clear visually at all! - This is not a GARMONY!
This is not compact executable code at all!
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This expression (1) in show able signs for 1-address or 2-address Instruction Set Intel-80x86 we can show as:
:=A,alpha *beta /gamma :+A,delta :-A,eta
In this case - we can see - that 3 addresses, signed as A - are unnecessary!
This is not so clear visually! - This is not so a GARMONY!
This is not so compact executable code!
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This expression (1) in show able signs for Expressible Instruction Set LUX-processors Luxium we can show as:
alpha *beta /gamma +delta -eta
This is clear visually at all! - This is the fullest GARMONY !!!
This is most compact executable code at all !!!
Such compact executable code has most full using executable code cash-memory!
On this reason compact executable code is most quick!
I have the emulator-interpreter of such Expressible Instruction Set LUX-processor Luxium!
Let's think - how begin serial industrial development of such Expressible Instruction Set LUX-processor Luxium!
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